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Navigating the Pitfalls and Making the CHIPS Act Work

As 2022 comes to a close, it is worth discussing the milestone event that will impact the Tech hardware industry for the rest of the decade. The US enacted the CHIPS Act into law in August 2022. Along with similar policies in other regions, it marks the beginning of a realignment in semiconductor fabrication and the rest of the electronics supply chain.


But the CHIPS Act is more than just reinvigorated US industrial policy. The CHIPS Act was born to ensure that the defense industry had access to the latest IC fabrication technologies. For sixty years, the US DoD depended on domestic technical superiority for strategic advantage. But that advantage had eroded with TSMC's industry dominance and the business evolution of domestic suppliers. The inevitable rise of China's semiconductor industry only added urgency.


Unfortunately, building fabs on domestic soil using subsidies as an incentive is the easy part. Keeping them there so the industry can thrive for future US strategic advantage is much more challenging. Gone are the days when technologies like radar, GPS, or even the internet, were commercialized from an initial military need. With few exceptions (like GaN), today, innovations (like AR/VR, robotics, AI, etc.) spill over into the defense industry. In this century, technical superiority for defense will come from having a sustainable commercial innovation engine. Building fabs will only be enough if there is a sustainable way to drive commercial innovation spillovers in the future.


Government policy experts designed the CHIPS Act as a defense policy implemented through the commerce department to address this issue. There are many excellent summaries of the contents of the law (link). For this discussion, it is worth viewing the law as having two goals.


The first is to "tread water." The law appropriates $39Bn of incentive funding (along with another $24Bn in tax credits) to build state-of-the-art fabs on US soil. This immediate action allows the military access to advanced technology should a conflict erupt.


Political actors have already signaled to semiconductor suppliers that they will receive funding. Indeed, according to SEMI, 18 new fabs are being built in the US between 2021 and 2023. The first milestone from this legislation occurred in early December when TSMC held a Tool-In ceremony for its Arizona Fab. (Yes, it is likely that TSMC, as a foreign company, will have access to funding.)


The second goal is to "revitalize" the domestic Tech hardware ecosystem and innovation engine over the long term. Part of the incentive funding is allocated to supporting other parts of the supply chain like materials production, fab equipment, testing, advanced packaging production, or research and development. The law also appropriates another $11Bn for R&D centers and workforce development programs. The purpose is to seed the industry for the future so the US can maintain and support a technological advantage.


The CHIPS Act is part of a two-pronged approach that includes export restrictions to China. Export restrictions will slow China's ability to gain advanced IC fabrication capability and give the US more time to revitalize its domestic supply chain.


Unfortunately, there are costs and collateral damage from industrial policy and protectionism. And every organization in the Tech hardware supply chain will feel the ripple effects. This note will review possible damage caused by the CHIPS act and accompanying trade restrictions. It will also offer thoughts on how organizations can navigate these issues.


Supply Distortions


The SIA lobbied for (and justified) the CHIPS Act to counter incentives offered in other countries. The intent was to build a minimum viable capacity (link) in the US that could serve both commercial and defense applications. Subsidies had to be large enough to attract domestic investment but small compared to private capital. The SIA, with the help of external consultants, threaded this needle with the following logic:


1) Assume the semiconductor industry will grow 6-10% per year to 2030.


2) To support this demand, the industry would need roughly $1.7 Trn in CAPEX spending over the decade. The SIA based this calculation on a historical 26% average capital intensity. The SIA went an extra step and converted the CAPEX spending to wafer capacity.


3) $50-60bn of public funding to support this CAPEX would account for less than 3% of the total. So at least in theory, the impact should be small enough not to distort supply.



Unfortunately, CAPEX and end demand are not synchronized. A better correlation, if even possible, would be to link CAPEX spending to the number of companies that think they can capture end demand. New foundry entrants (i.e., Skywater, Rapidus, and LA Semiconductor) will compete within regions for parts of the market. These new entrants will inevitably duplicate capacity and compete for market share. In addition, these companies are smaller and will process much lower volumes than a GigaFab from TSMC. Both of these effects will lower fab utilization rates and decrease efficiencies.


This realization is starting to make its way into financial presentations and analyst coverage. ASML recently disclosed (link) its view of wafer capacity growth in an investor day presentation. For the first time, ASML included an inefficiency factor in its analysis.


A recently released report from SEMI (link) shows that the global semiconductor industry is spending approximately $500Bn in CAPEX between 2021 and 2023. That is enough CAPEX to build 84 new fabs by 2024. If we apply some back-of-the-envelope calculations, these 84 fabs will add about 20M 300mm eq wafer starts per year of capacity. That is already more than enough wafers to support a $700Bn industry by 2024. And that is just from the anticipation of US funding. More latent capacity will come online once subsidies from other countries become available (European CHIPS Act (link), South Korea K-Belt (link), India (link), and China (link)).


A $700Bn semiconductor industry by 2025 seems optimistic, especially heading into a downturn at the end of 2022. Even if the industry follows the most optimistic one trillion dollar forecast (link), capacity looks too much in the near term. If the industry falls back to its historical growth rates, it will be a disaster.




Supply and demand always balance in the long term. But in the near term, wafer fab makers will opportunistically pull in CAPEX spending to capitalize on available subsidies. It is a classic business cycle but on "subsidy steroids." It will lead to overcapacity. Overcapacity leads to pricing pressure that sabotages market growth.


The short-term economic pain may be worth it for the US or any other region attempting to re-shore wafer fabrication technology. But the semiconductor industry is not like the garment industry, the steel industry, or many of the other sectors lost to offshoring. There is still a significant amount of technical change. State of the art today is trailing edge in two to four years. What will happen when the US defense department needs to ensure it has access to the latest technologies again? Unless the economic structure of the industry changes, subsidies may become a constant expectation, and so will the deeper boom and bust cycles. A discussion on CHIPS Act 2.0 and 3.0 is already beginning to surface (link).


It is ironic. The semiconductor industry consolidated significantly between 2010 to 2020. That consolidation led to more rational CAPEX spending and softened the swings of the business cycle. But, with the signing of the CHIPS Act, semiconductor manufacturers may be reverting back to those stomach-turning boom-bust peaks.


Moreover, what government gives, the government will take away. Recent export restrictions to China on advanced manufacturing equipment limit the opportunity available to fab equipment makers who will benefit from this CAPEX infusion. Lam Research has warned investors of a $2.5Bn (link)revenue fall due to export controls. Inevitably, the export restrictions allow Chinese equipment suppliers to fill the void (link).


For equipment vendors and their supply chains, timing is everything. Charting booms and busts is always challenging, but it has to become a much larger part of strategic planning (as it was in the old days before consolidation). Like any portfolio of revenue streams, it will be essential to soften the exposure of booms and busts. If that isn't realistic, more cash on hand will have to cushion the juiced-up cyclicality.


Cost Disadvantages


Like most advanced economies, the US has higher labor costs and stricter regulations. The CHIPS Act does nothing to offset operational or structural disadvantages vis-à-vis low-cost region competitors. Moreover, the supporting US Tech hardware ecosystem has atrophied considerably. So even if suppliers fabricate ICs in the US, they will most likely have to export them to Asia for downstream board assembly.


These added operational costs are only possible to assess with privileged access. But analysts have estimated cost adders as low as 7% to as high as 40%. TSMC's Morris Chang was blunt. He (at least initially) called US efforts to bolster its domestic semiconductor industry "a very expensive exercise in futility." (link)


Higher costs may be acceptable for leading-edge devices where only two or three suppliers can make them. Apple and Nvidia have already committed to buying chips in TSMC's Arizona facility, and they can absorb the higher costs.


But it is hard to see how reshoring will sustain itself for more price-sensitive semiconductors. The CHIPS Act devotes $2Bn (from the $39B bucket) to reshoring trailing edge semiconductors. Most ASICs, DRAM, and power discretes don't need leading-edge process technology. The market for manufacturing these devices has lower entry barriers. There are many more capable suppliers, which puts a ceiling on profitability. Lower profitability limits R&D investment and favors low-cost labor regions.


Moreover, US fabricators may be susceptible to aggressive price manipulation through dumping practices. And pricing manipulation could spiral into increasing industry protections. The US could issue incentives to "Buy American" or restrict foreign-made semiconductor access. Trade restrictions don't even need to be explicit. For example, under pressure from US regulators, Apple recently dropped plans (link) to use NAND from China's Yangtze Memory Technologies. Protectionism can happen without declaration.


Suppliers will need to dance through these restrictions carefully. Local subsidiaries will need to follow local sourcing requirements for trailing-edge semiconductor manufacturing. The only consolation is that every semiconductor supplier is in the same boat.


The same issues hamper reshoring efforts for other parts of the Tech hardware ecosystem. For example, the Printed Circuit Board Association of America and the IPC have recently lobbied for the Supporting American Printed Circuit Boards Act of 2022 (SAPCB) (link) to revitalize the domestic production of PCBs. If a conflict should erupt, the DoD can stockpile most other commodity electronic components. But PCBs, and most display panels, are custom-fabricated. Each part is different and challenging to stockpile for new designs. The PCBAA and IPC justify (link) SAPCB using the same rationale as the CHIPS act. Only a few companies globally can manufacture the most advanced PCBs. Ergo, public funds should support incentives to build an advanced domestic manufacturing facility.


But, like trailing edge semiconductors, the PCB industry's entry barriers are lower than advanced semiconductors. As a result, there are many more capable global suppliers for the trailing-edge market. And lower-cost regions have a comparative advantage. At least the SAPCB addresses this issue head-on with "Buy American" tax incentives built into the bill. Whether there is an appetite for further industrial policy spending is another issue.


Innovation Engines Are Fragile


If the goal is to prime the domestic innovation engine, subsidies and trade restrictions like "Buy American" could backfire and cause collateral damage. Below are a few scenarios:

  • Higher hardware costs from protected industries could slow the development of new technologies. No one would doubt that machine learning has advanced rapidly over the last decade. But this wasn't technology that pushed its way onto the market. Instead, advertising on social media platforms accessed through smartphones drove incentives. New technologies like AR/VR will follow a different trajectory if hardware costs rise beyond what consumers can afford because the component costs are higher in the US.

  • Trade restrictions shut out innovations from other countries. For example, China is leading in machine learning technology on edge devices. These advances happened because the PRC normalized domestic surveillance activity. Set aside the ethics for a moment. Would it not benefit the US to access these innovations for other applications?

  • Regional market boundaries reduce revenues and reinvestment. Regional suppliers have limited market reach. It limits their revenue potential and reduces profits for reinvesting in future innovations. The total industry investment could remain the same. But the amount contributed by each supplier is smaller and less efficient.

  • Economists have learned much about industry protections in advanced economies. The main lesson is that industry protections make firms less competitive. And, lack of competition reduces incentives to innovate. Could the semiconductor industry turn into the telephone companies of the 1960s and 1970s?

  • Industry funding becomes endemic. The SIA recently offered a second proposal for semiconductor IP company leadership (link). Like the CHIPS Act, the SIA justifies funding for IP design on the need to counter government funding from other nations. But the US already leads the world in silicon IP with a thriving supply base. If governments set expectations, suppliers will normalize subsidies in their future business planning.

Administrators in the CHIPS Program Office (CPO) aren't naive. Discussion topics in recent public information requests (link) show that the CPO understands these pitfalls. Recognizing these pitfalls is the first step in developing successful proposals to navigate around them.


Ultimately, proposals targeting the commerce R&D sections of the CHIPS Act will have to link how funding will advance a sustainable domestic innovation ecosystem. And the only way to do that is to develop productivity improvements. Productivity gains offset the comparative advantages of lower-cost manufacturing regions. RCD Advisors has offered some suggestions for wafer equipment makers to engineer equipment that lowers the minimum viable scale (and increases CAPEX efficiency) (link). But there are plenty of other good ideas.


Productivity improvements can come from standardization. Standardization can reduce costs through learning curves and economies of scale. It doesn't mean picking winners, but it may mean acknowledging them. For example, there are currently many competing system-in-package processes. Each method has advantages and disadvantages depending on the end application. Proposals that can make one approach more versatile and expand its use across applications will be more efficient. Even if it is not the best in class for every application, "good enough" (link) is far more attractive from a commercial standpoint. This approach departs from RDT&E defense funding, where there is a premium for state-of-the-art.


Productivity improvements can also come from the surrounding ecosystem. Economists have long known that ecosystems provide benefits from knowledge spillovers, labor pooling, and supplier proximity. Proposals that use wafer fabrication as an anchor for supporting an ecosystem cluster will be more persuasive. For example, a tier-one auto assembler could build an inverter assembly facility near a SiC wafer fab. Likewise, an OSAT could propose building a state-of-the-art package assembly facility near a new fab. These clusters offer supply chain efficiencies and will be critical to revitalization.


Clustering is just one of many ways to develop an ecosystem. Ecosystems can also emerge through innovations that happen from integration across other component sectors of the supply chain. Proposals that cross-fertilize innovations could help establish new ecosystems. Here are a few examples:

  • microLED backlights, display technologies, and assembly

  • On-chip or on-package integrated passive technologies

  • Interface ICs and board-level interconnects

  • Die-level thermal management and power semiconductors

  • Embedded die in PCBs

  • mmWave RF antenna integration

Readers can come up with many more ideas. But the broader point is that proposers need to show sustainable productivity improvements that enable commercial sustainability rather than near term, rent-seeking opportunism.


Like it or not, geopolitics will shape the Tech hardware industry for the rest of the decade. Technology subsidies and trade restrictions are blunt weapons deployed in a complicated geopolitical conflict. Unfortunately, semiconductor economics is a delicate balancing act, and innovation in the Tech hardware industry is fragile. The odds for collateral damage are high. Organizations caught in the middle will have to focus on innovations with a clear path to achieving competitive productivity improvements. RCD Advisors can help support efforts to navigate this path.


Edited for clarity 12/31/22


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